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US 2026/0089935 A1Published application
Memory device having global silicon on insulator
AssigneeMicron Technology, Inc.
InventorsMandar Suresh Bhoir, Dan Mihai Mocuta, Durai Vishak Nirmal Ramaswamy
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Abstract
A variety of applications can include a memory device having a periphery to a memory array of the memory device, with the periphery having one or more devices constructed in a semiconductor on insulator in the periphery. The semiconductor on insulator can be silicon on insulator.
Claims20
A memory device comprising:
- a memory array region;
- and
- a periphery to the memory array region, the periphery including devices structured with components in semiconductor on insulator regions in the periphery, the semiconductor on insulator regions disposed on a bulk substrate.
A method of forming a memory device, the method including:
- forming a memory array region;
- and
- forming devices, in a periphery to the memory array region, structured with components in silicon on insulator regions in the periphery, the silicon on insulator regions disposed on a bulk substrate.
A method of forming a memory device, the method comprising:
- forming a silicon germanium region on a silicon substrate;
- forming a silicon region on and contacting the silicon germanium region;
- removing the silicon germanium region, forming a cavity between the silicon region and the silicon substrate;
- forming an oxide in the cavity, generating silicon on insulator regions in a periphery to a memory array region in the silicon substrate;
- and
- forming devices in the periphery, including structuring components of the devices in the silicon on insulator regions.
3 more elements
Dependencies are inferred from the claim text.