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US 2026/0076203 A1Published application
Semiconductor package substrate
AssigneeHaesung Ds Co., Ltd.
InventorsDong Jin YOON, Sung Il KANG
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Abstract
A semiconductor package substrate includes a base substrate including a conductive material and having a first groove or first trench located in a bottom surface of the base substrate, a resin filled into the first groove or first trench, a first plating layer disposed on a top surface of the base substrate, and a second plating layer disposed on the bottom surface of the base substrate, wherein the base substrate includes a stress reducing portion configured to reduce stress.
Claims7
A semiconductor package substrate comprising:
- a base substrate comprising a conductive material and having a first groove or first trench located in a bottom surface thereof;
- a resin filled into the first groove or first trench;
- a first plating layer disposed on a top surface of the base substrate;
- and
- a second plating layer disposed on the bottom surface of the base substrate,
- wherein the base substrate comprises a stress reducing portion configured to reduce stress.
3 more elements
A semiconductor package substrate comprising:
- a base substrate comprising a conductive material and having a first groove or first trench located in a bottom surface of the base substrate;
- a resin filled into the first groove or first trench;
- and
- a plating layer disposed on the base substrate,
- wherein the base substrate comprises a stress reducing portion configured to reduce stress.
2 more elements
Dependencies are inferred from the claim text.