Memory module and computing system using the same
AssigneeSK hynix Inc.
InventorSeong Ju LEE
Life of this patent
Estimating the term…
Abstract
A memory module may include a module substrate, a first memory package, a second memory package, and a module controller circuit. The module substrate may include first signal transmission lines and second signal transmission lines. Memory chips of the first memory package may be coupled in common to the first signal transmission lines. Memory chips of the second memory package may be coupled in common to the second signal transmission lines. The module controller circuit may connect a data bus to one of the first signal transmission lines and the second signal transmission lines based on a chip selection signal.
Claims21
A memory module, comprising:
- a module substrate including first signal transmission lines and second signal transmission lines;
- a first memory package mounted on a front side of the module substrate, the first memory package including a first memory chip accessed by a first chip selection signal and a second memory chip accessed by a second chip selection signal, wherein data pads of the first memory chip and data pads of the second memory chip are coupled in common to the first signal transmission lines;
- a second memory package mounted on a rear side of the module substrate, the second memory package including a third memory chip accessed by a third chip selection signal and a fourth memory chip accessed by a fourth chip selection signal, wherein data pads of the third memory chip and data pads of the fourth memory chip are coupled in common to the second signal transmission lines;
- and
- a module controller circuit mounted on the front side of the module substrate, the module controller circuit being coupled to an external apparatus through a data bus and configured to connect the data bus to one of the first signal transmission lines and the second signal transmission lines based on the first to fourth chip selection signals.
A memory module, comprising:
- a module substrate including first signal transmission lines and second signal transmission lines;
- a memory package mounted on the module substrate, the memory package including a first memory chip accessed by a first chip selection signal, a second memory chip accessed by a second chip selection signal, a third memory chip accessed by a third chip selection signal, and a fourth memory chip accessed by a fourth chip selection signal, wherein data pads of the first memory chip and data pads of the second memory chip are coupled in common to the first signal transmission lines, and data pads of the third memory chip and data pads of the fourth memory chip are coupled in common to the second signal transmission lines;
- and
- a module controller circuit mounted on the module substrate, the module controller circuit being coupled to an external apparatus through a data bus and configured to connect the data bus to one of the first and second signal transmission lines based on the first to fourth chip selection signals.
Dependencies are inferred from the claim text.