Integrated circuits including polysilicon resistors

An integrated circuit comprising:

• a semiconductor substrate of a first conductivity type;
• active regions on an upper surface of the semiconductor substrate and extending in a first direction;
• an isolation layer on the upper surface of the semiconductor substrate, the isolation layer electrically isolating the active regions and defining boundaries of the active regions;
• polysilicon resistors on the active regions and the isolation layer, the polysilicon resistors extending in a second direction that is perpendicular to the first direction;
• and
• a well region of a second conductivity type that is on the upper surface of the semiconductor substrate and arranged adjacent to the active regions, the well region comprising a first well region arranged at a first side of the well region in the first direction and a second well region arranged at a second side of the well region in the first direction,
• wherein the active regions beneath the polysilicon resistors comprise first active regions overlapping the first and second well regions in the first direction and second active regions that are a remainder of the active regions, and each of the first active regions is discontinuous such that the isolation layer is disposed between portions of the first active regions in the first direction.

An integrated circuit comprising:

• a semiconductor substrate;
• active regions on an upper surface of the semiconductor substrate and extending in a first direction;
• an isolation layer on the upper surface of the semiconductor substrate, electrically isolating the active regions, and defining boundaries of the active regions;
• polysilicon resistors on the active regions and the isolation layer, the polysilicon resistors extending in a second direction that is perpendicular to the first direction;
• and
• dummy polysilicon resistors disposed, on the upper surface of the semiconductor substrate, at outer peripheries of the polysilicon resistors, and adjacent to both sides of the polysilicon resistors in the first direction,
• wherein each of the active regions beneath the polysilicon resistors and the dummy polysilicon resistors comprises at least one discontinuous portion such that the isolation layer is disposed between the discontinuous portions in the first direction.