Mask Fabrication Method, Mask, Josephson Junction Element and Quantum Chip

Abstract

A mask fabrication method, mask, Josephson junction element, and quantum chip is provided, which belong to the field of quantum information, especially the field of quantum computing. The mask fabrication method includes: providing a dielectric layer, wherein a ratio of a thickness of the dielectric layer to a line width of a target pattern to be fabricated is greater than a cutting depth-to-width ratio allowed by a patterning apparatus; determining a first sublayer and a second sublayer of the dielectric layer, wherein a ratio of a thickness of the second sublayer to the line width of the target pattern is less than or equal to the cutting depth-to-width ratio; forming the target pattern on the second sublayer and a first pattern on the first sublayer, wherein the first pattern exposes the target pattern. The present application is capable of fabricating a mask containing the target pattern when the ratio of the provided dielectric layer thickness to the line width of the target pattern to be fabricated is greater than the cutting depth-to-width ratio allowed by the patterning apparatus.

Dependencies are inferred from the claim text.