Chip deviation correction method for maskless exposure machine

A chip deviation correction method for maskless exposure machines, wherein a plurality of chips is combined onto a substrate, and the chips comprise a plurality of contacts and a lead wire separately formed on the contacts by a predetermined exposure, and the method comprising the steps of:

• (a) calculating the positions where the chips are bonded onto the substrate to define the coordinates of the chips on the substrate;
• (b) creating a separating boundary among the chips according to the coordinates of the chips on the substrate to form a plurality of bonding areas for accommodating the corresponding chips respectively;
• (c) calculating a lead wire of the chips disposed in the bonding area thereof, and calculating a compensating wire which spans across the separating boundary between each lead wire and the lead wire of the corresponding adjacent chip according to the calculated lead wire;
• and
• (d) forming a digital exposed layer according to each of the lead wires and each of the compensating wires.