Integrated Memory with Redistribution of Capacitor Connections, and Methods of Forming Integrated Memory

An integrated assembly, comprising:

• semiconductor-material-pillars which each have a digit-line-contact-region between a pair of capacitor-contact-regions;
• the capacitor-contact-regions being arranged in an array, with the array having alternating first and second rows;
• conductive plugs coupled with the capacitor-contact-regions;
• conductive redistribution material coupled with the conductive plugs, and through the conductive plugs to the capacitor-contact-regions;
• the conductive redistribution material having a first configuration along the first rows, with the first configuration extending laterally outwardly from the capacitor-contact-regions of the first rows in a first direction substantially along the first rows;
• the conductive redistribution material having a second configuration along the second rows, with the second configuration extending laterally outwardly from the capacitor-contact-regions of the second rows in a second direction substantially along the second rows;
• the second direction being substantially opposite to the first direction;
• the conductive redistribution material having upper surfaces;
• digit lines over the digit-line-contact-regions;
• insulative regions between the digit lines and the conductive plugs;
• the insulative regions comprising one or both of voids and low-k dielectric material, with the voids and/or low-k dielectric material contacting upper surfaces of the capacitor-contact-regions;
• and
• capacitors coupled with the upper surfaces of the conductive redistribution material.

A method of forming an integrated assembly, comprising:

• forming a construction having semiconductor-material-pillars which each have a digit-line-contact-region between a pair of capacitor-contact-regions;
• the capacitor-contact-regions being arranged in an array, with the array having alternating first and second rows;
• the digit-line-contact-regions being spaced from the capacitor-contact-regions along a first cross-section along the first rows, and being spaced from the capacitor-contact-regions along a second cross-section along the second rows;
• digit lines being directly over the digitline-contact-regions along the first and second cross-sections;
• conductive plugs being directly over the capacitor-contact-regions along the first and second cross-sections;
• sacrificial material being between the conductive plugs and the digit lines;
• removing the sacrificial material to form void regions;
• forming an insulative mass extending across the conductive plugs;
• forming first openings extending to the conductive plugs along the first cross-section, and forming second openings extending to the conductive plugs along the second cross-section;
• the first and second openings having a first shape and a second shape, respectively, with the second shape being substantially a mirror image of the first shape;
• forming conductive redistribution material within the first and second shapes of the first and second openings;
• and
• forming capacitors coupled with the conductive redistribution material.