Dummy vertical structures for etching in 3d nand memory and other circuits
AssigneeMacronix International Co., Ltd.
InventorsChih-Wei HU, Teng-Hao YEH, Yu-Wei JIANG
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AssigneeMacronix International Co., Ltd.
InventorsChih-Wei HU, Teng-Hao YEH, Yu-Wei JIANG
Estimating the term…
A memory device comprises a stack of patterned conductor layers, at least a plurality of the layers comprising conductive strips including strips continuous with a pad and other strips isolated from the pad. An array of vertical pillars extends through the stack of patterned conductor layers, wherein memory cells are disposed at cross-points between the vertical pillars and patterned conductor layers. The array has an array boundary proximal to the pad. A first set of isolation blocks extends through the plurality of patterned conductor layers separating the strips continuous with the pad from the other strips isolated from the pad. A second set of isolation blocks inside the array boundary extends through the plurality of patterned conductor layers isolating the other strips from the pad.
A memory device, comprising:
A method for manufacturing a memory device, comprising:
A 3D circuit, comprising:
Dependencies are inferred from the claim text.