Contact structures for thin film transistor devices

A thin film transistor (TFT) device, comprising:

• a substrate;
• a gate formed above the substrate;
• a TFT channel formed above the substrate;
• and
• a pair of contacts formed on the TFT channel, wherein each of the contacts comprises one or more layers including:
• a metal that is non-reactive with a material of the TFT channel, wherein a Gibs free energy value (J/mol) of the metal of the one or more layers is less negative than a Gibs free energy value (J/mol) of the TFT channel;
• or
• a plurality of layers including a first metal layer formed on a second layer, the second layer in contact with the TFT channel and between the first mater layer and the TFT channel, wherein the second layer comprises an absorption layer or an insulating barrier.

A system, comprising:

• a processor;
• a memory coupled to the processor;
• wherein the memory or the processor includes a thin film transistor (TFT) device, wherein the TFT device comprises:
• a substrate;
• a gate formed above the substrate;
• a TFT channel formed above the substrate;
• and
• a pair of contacts formed on the TFT channel, wherein each of the contacts comprises one or more layers including:
• a metal that is non-reactive with a material of the TFT channel;
• or
• a plurality of layers including a first metal layer formed on a second layer, the second layer in contact with the TFT channel and between the first mater layer and the TFT channel.