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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChien-Ying CHEN, Lee-Chung LU, Li-Chun TIEN, Ta-Pen GUO
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A method of generating a layout diagram of an IC cell includes defining a boundary recess in a boundary of the cell by extending a first portion of the boundary along a first direction, extending a second portion of the boundary away from the first portion in a second direction perpendicular to the first direction, the second portion being contiguous with the first portion, and extending a third portion of the boundary away from the first portion in the second direction, the third portion being contiguous with the first portion. An active region is positioned in the cell by extending the active region away from the first portion in a third direction opposite to the second direction. The layout diagram is stored on a non-transitory computer-readable medium.
A method of generating a layout diagram of an integrated circuit (IC) cell, the IC layout diagram being stored on a non-transitory computer-readable medium, the method comprising:
A method of generating a layout diagram of an integrated circuit (IC), the IC layout diagram being stored on a non-transitory computer-readable medium, the method comprising:
An integrated circuit (IC) device comprising:
Dependencies are inferred from the claim text.