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US 2019/0318136 A1Published application
An active shield for detecting an intrusion on an integrated circuit
AssigneeNagravision S.A.
InventorJean-Marie MARTIN
Life of this patent
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Abstract
A method and a device for detecting an attack on an integrated circuit. Attacks which are detectable using an active shield as described herein include physical and electrical contacting using a probe and modification of interconnect routing, including modification through the use of focused ion beam technology.
Claims15
In an integrated circuit, an active shield for detecting an intrusion on the integrated circuit, the active shield comprising:
- a first driver to drive a first conductive track having a first predetermined routing within the integrated circuit;
- and
- a second driver to drive a second conductive track having a second predetermined routing within the integrated circuit;
- wherein at least a part of the second conductive track lies adjacent to a part of the first conductive track at a given spacing and over a given length of the two conductive tracks, the given spacing and the given length being such that a rising or falling edge of a pulse generated on the second conductive track causes a glitch to appear on the first conductive track due to a resulting mutual capacitance between the first and second conductive tracks;
- wherein the active shield is configured to:
- drive a first number of test pulses on the second conductive track during a detection phase;
- and
- detect for glitches on the first conductive track during the detection phase and to compare a number of detected glitches with a number of expected pulses, the number of expected pulses being related to but not exceeding the first number of test pulses.
5 more elements
A method for detecting a hardware attack on an integrated circuit, the integrated circuit comprising:
- a first driver to drive a first conductive track having a first predetermined routing within the integrated circuit;
- and
- a second driver to drive a second conductive track having a second predetermined routing within the integrated circuit;
- the first driver having an output impedance which is significantly higher than an output impedance of the second driver;
- wherein at least a part of the second conductive track lies adjacent to a part of the first conductive track at a given spacing and over a given length of the two conductive tracks, the given spacing and the given length being such that a rising or falling edge of a pulse generated on the second conductive track causes a glitch to appear on the first conductive track due to a resulting mutual coupling capacitance between the first and second conductive tracks;
- the method comprising:
- driving a number of test pulses on the second conductive track during a detection period over which the first driver remains steady;
- and
- counting a number of glitches on the first conductive track and comparing the number of glitches with an expected number of pulses, the expected number of pulses being related to but not exceeding the number of test pulses.
6 more elements
Dependencies are inferred from the claim text.