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US 2017/0256555 A1Published application
Semiconductor device and method for manufacturing semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorsMasafumi HAMAGUCHI, Shinji KAWAHARA
Life of this patent
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Abstract
According to one embodiment, a semiconductor device includes a memory cell array including a first memory cell provided on a substrate and a second memory cell provided on the substrate. The memory cell array includes a charge storage layer provided on the substrate and a control electrode provided on the charge storage layer. A coupling ratio of the second memory cell is different from a coupling ratio of the first memory cell.
Claims20
A semiconductor device, comprising:
- a memory cell array including a first memory cell provided on a substrate and a second memory cell provided on the substrate, the memory cell array including a charge storage layer provided on the substrate and a control electrode provided on the charge storage layer,
- a coupling ratio of the second memory cell being different from a coupling ratio of the first memory cell.
A semiconductor device, comprising:
- a memory portion;
- and
- a logic portion,
- the memory portion including a memory cell array including a first memory cell provided on a substrate and a second memory cell provided on the substrate, the memory cell array including a charge storage layer provided on the substrate and a control electrode provided on the charge storage layer,
- a coupling ratio of the second memory cell being different from a coupling ratio of the first memory cell.
2 more elements
A method for manufacturing a semiconductor device, comprising:
- forming a first insulating film, a charge storage layer provided on the first insulating film, and a second insulating film provided on the charge storage layer above a substrate;
- and
- changing a dielectric constant of an area of a part of the second insulating film.
Dependencies are inferred from the claim text.