Nonvolatile semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorsYasuyuki BABA, Kazuichi KOMENAKA, Hirofumi INOUE
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AssigneeKabushiki Kaisha Toshiba
InventorsYasuyuki BABA, Kazuichi KOMENAKA, Hirofumi INOUE
Estimating the term…
According to one embodiment, a nonvolatile semiconductor memory device comprises a memory cell array including a first selection gate, word lines and a second selection gate stacked above a semiconductor substrate, and a memory pillar disposed through the first selection gate, word lines and second selection gate, a hookup region disposed adjacent to the memory cell array region in a first direction, and a dummy region disposed outside the memory cell array region and the hookup region, the dummy region including dummy word lines, each provided at the same layer as the associated word line.
A nonvolatile semiconductor memory device comprising:
A nonvolatile semiconductor memory device comprising:
The device of claim 11, wherein the dummy region includes patterns each extending from an upper surface to each of the dummy word lines.
Dependencies are inferred from the claim text.