US 2015/0102387 A1 · High Electron Mobility Transistors with Minimized Performance Effects of Microcracks in the Channel Layers

Abstract

In HEMTs based on III-nitrides epitaxial films or GaAs, AlGaAs and InGaAs epitaxial films, unwanted microcracks are often formed in the composite epitaxial layers in the channel region during fabrication and operation. These microcracks are caused by strain or stresses due to lattice mismatch and thermal expansion coefficient differences between materials and substrate's. Those microcracks will bring about an increase in source to drain resistance and lead to performance and reliability degradation of the HEMTs and the MMICs containing them. The present invention provides HEMTs with minimized effects of the unwanted microcracks by aligning the channel region long axis to a certain direction so that the channel region long axis forms a right angle with axis of at least one type of the microcracks.

Claims22

Dependent claims

A high electron mobility transistor having minimized effects of unwanted microcracks in the channel layers, for power switching and millimetre wave integrated circuit applications comprises

a substrate;
a composite epitaxial layer including at least an epitaxial buffer layer, a conductive channel layer, a Schottky barrier layer, a source ohmic layer and a drain ohmic layer;
a drain and a source defining a channel region having a channel region long axis, a channel region length and a channel region width;
and
a gate having a gate long axis, a gate length and a gate width;
wherein long axes of said unwanted microcracks induced in said composite epitaxial layers during fabrication and operation are parallel to each other, said channel region long axis of said HEMT is aligned in order that an angle θ between said channel region long axis and said long axis of all of said unwanted microcracks is 90°±Δθ so that effects of said unwanted microcracks on a resistance increase between said source and said drain is minimized.

3 more elements

A high electron mobility transistor having minimized effects of three types of unwanted microcracks in the channel layers, for power switching and millimetre wave integrated circuit applications comprises

a substrate;
a composite epitaxial layers including at least an epitaxial buffer layer, a conductive channel layer, a Schottky barrier layer, a source ohmic layer and a drain ohmic layer;
a drain, a source defining a channel region having a channel region long axis, a channel region length and a channel region width;
a gate having a gate long axis, a gate length and a gate width;
wherein said three types of unwanted microcracks are induced in said composite epitaxial layers during fabrication and operation, said channel region long axis of said HEMT is aligned to make a first angle θA with a first microcrack long axis, a second angle θB with a second microcrack long axis and a third angle θC with a third microcrack long axis, effects of said three types of unwanted microcracks on a resistance increase between said source and said drain is minimized by selecting one of said three angles to be 90°±Δθ.

2 more elements

Dependencies are inferred from the claim text.

High Electron Mobility Transistors with Minimized Performance Effects of Microcracks in the Channel Layers

Life of this patent

High Electron Mobility Transistors with Minimized Performance Effects of Microcracks in the Channel Layers

Life of this patent

Abstract

Claims22