FinFET Device and Method of Fabricating Same

An integrated circuit structure comprising:

• a semiconductor substrate;
• isolation regions extending into the semiconductor substrate, wherein the isolation regions comprise opposite sidewalls facing each other;
• and
• a fin structure comprising:
• a silicon fin higher than top surfaces of the isolation regions;
• a silicon strip between the opposite sidewalls of the isolation regions, wherein sidewalls of the silicon strip are in contact with the opposite sidewalls of the isolation regions;
• a germanium-containing semiconductor region between aligned to the silicon fin and the silicon strip;
• a first and a second silicon oxide region on opposite sides of the germanium-containing semiconductor region;
• a first germanium-containing semiconductor layer between and in contact with the silicon fin and the first silicon oxide region;
• a second germanium-containing semiconductor layer between and in contact with the silicon fin and the second silicon oxide region;
• a third germanium-containing semiconductor layer between and in contact with the silicon strip and the first silicon oxide region;
• and
• a fourth germanium-containing semiconductor layer between and in contact with the silicon strip and the second silicon oxide region.

An integrated circuit structure comprising:

• a semiconductor substrate;
• isolation regions extending into the semiconductor substrate, wherein the isolation regions comprise opposite sidewalls facing each other;
• and
• a fin structure comprising:
• a silicon fin higher than top surfaces of the isolation regions;
• a germanium-containing semiconductor region;
• and
• a silicon oxide region comprising:
• a first and a second portion on opposite sides of the germanium-containing semiconductor region;
• and
• a top portion connecting the first portion to the second portion, wherein the top portion fully separates the germanium-containing semiconductor region from the silicon fin.