SRAM Cell Comprising FinFETs

A Static Random Access Memory (SRAM) cell comprising:

• a p-well region in the SRAM cell;
• a first n-well region and a second n-well region on opposite sides of the p-well region;
• a first semiconductor fin in the first n-well region;
• a second semiconductor fin in the p-well region;
• a first gate electrode in the first n-well region, wherein the first gate electrode crosses the first semiconductor fin to form a first pass-gate Field-Effect Transistor (FinFET);
• and
• a second gate electrode extending into the first n-well region and the p-well region, wherein the second gate electrode forms a first pull-up FinFET with the first semiconductor fin, and a first pull-down FinFET with the second semiconductor fin.

A Static Random Access Memory (SRAM) cell comprising:

• a first pull-up Fin Field-Effect Transistor (FinFET) and a second pull-up FinFET;
• a first pull-down FinFET and a second pull-down FinFET forming cross-latched inverters with the first pull-up FinFET and the second pull-up FinFET;
• a first pass-gate FinFET connected to first drains of the first pull-up FinFET and the first pull-down FinFET;
• a second pass-gate FinFET connected to second drains of the second pull-up FinFET and the second pull-down FinFET, wherein the first and the second pass-gate FinFETs are p-type FinFETs;
• a third pull-up FinFET comprising a gate connected to gates of the second pull-up FinFET and the second pull-down FinFET;
• a third pass-gate FinFET cascaded with the third pull-up FinFET;
• a p-well region underlying the first and the second pull-down FinFETs;
• and
• a first n-well region and a second n-well region on opposite sides of the p-well region, wherein the first pull-up FinFET and the first pass-gate FinFET are in the first n-well region, and wherein the second and the third pull-up FinFETs and the second and the third pass-gate FinFETs are in the second n-well region.