Semiconductor Integrated Structure

An integrated structure, comprising:

• a substrate, wherein a resistor region and an active region are defined on the substrate;
• an ILD layer disposed directly on the substrate;
• a transistor disposed in the ILD layer in the active region, wherein the transistor comprises a metal gate;
• a resistor disposed on the ILD layer in the resistor region, wherein the resistor directly contacts the ILD layer;
• a dummy resistor disposed in the ILD layer in the resistor region, wherein the dummy resistor comprises at least a metal layer;
• and
• a contact plug penetrating through the resistor and directly contacting the metal layer in the dummy resistor.

An integrated structure, comprising:

• a substrate, wherein a resistor region and an active region are defined on the substrate;
• an ILD layer disposed directly on the substrate;
• a transistor disposed in the ILD layer in the active region, wherein the transistor comprises a metal gate;
• and
• a resistor disposed in the ILD layer in the resistor region, wherein the resistor has a U-shaped structure.