Method and apparatus for buried-channel semiconductor device

Abstract

Methods and apparatus of integrating a buried-channel PMOS into a BiCMOS process. The apparatus comprises at least one bipolar transistor and at least one MOS device coupled to the at least one bipolar transistor, such that a gate of the at least one MOS device may be coupled to an emitter of the at least one bipolar transistor. The MOS device comprises a buried channel having mobility means, such as strained silicon for promoting hole mobility in the buried channel, and confinement means, such as a cap layer disposed proximate to the buried channel for limiting leakage of holes from the buried channel. The apparatus may be formed by exposing a substrate in a PMOS, forming a SiGe layer on the substrate, forming an oxide layer on the SiGe layer, masking the PMOS, and removing at least some of the oxide and at least some of the SiGe layer.

Dependencies are inferred from the claim text.