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US 2012/0068174 A1Published application
Electrical mask inspection
AssigneeInternational Business Machines Corporation
InventorsArvind Kumar, Anthony I-Chih Chou, Shreesh Narasimha
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Abstract
An apparatus and method for electrical mask inspection is disclosed. A scan chain is formed amongst two metal layers and a via layer. One of the three layers is a functional layer under test, and the other two layers are test layers. A resistance measurement of the scan chain is used to determine if a potential defect exists within one of the vias or metal segments comprising the scan chain.
Claims20
A test circuit comprising:
- a first endpoint;
- a second endpoint;
- a first metal layer, comprising a plurality of segments;
- a second metal layer, comprising a plurality of segments;
- a via layer, comprising a plurality of vias wherein each via is configured and disposed to connect a segment of the first metal layer to a segment of the second metal layer;
- wherein the first metal layer comprises a segment connected to said first endpoint and also comprises a segment connected to said second endpoint;
- and
- wherein one of the layers selected from the group consisting of the first metal layer, the second metal layer, and the via layer is a functional layer, and the remaining layers of said group are test layers.
5 more elements
A method for testing an integrated circuit, comprising the steps of:
- forming a first endpoint;
- forming a second endpoint;
- forming a first metal layer, comprising a plurality of segments;
- forming a second metal layer, comprising a plurality of segments;
- forming a via layer, comprising a plurality of vias wherein each via is configured and disposed to connect a segment of the first metal layer to a segment of the second metal layer;
- wherein the step of forming the first metal layer comprises forming a segment connected to said first endpoint and also comprises forming a segment connected to said second endpoint;
- and
- wherein one of the layers formed is a functional layer, and wherein two of the layers formed are test layers.
5 more elements
A method for testing an integrated circuit, comprising the steps of:
- forming a plurality of scan chains, each scan chain formed by the steps of:
- forming a first endpoint;
- forming a second endpoint;
- forming a first metal layer, comprising a plurality of segments;
- forming a second metal layer, comprising a plurality of segments;
- forming a via layer, comprising a plurality of vias wherein each via is configured and disposed to connect a segment of the first metal layer to a segment of the second metal layer;
- wherein the step of forming the first metal layer comprises forming a segment connected to said first endpoint and also comprises forming a segment connected to said second endpoint;
- and
- wherein one of the layers formed is a functional layer, and wherein two of the layers formed are test layers;
- performing a resistance measurement between the first endpoint and second endpoint of each of the plurality of scan chains;
- and
- indicating a failure if the resistance measurement exceeds a predetermined threshold.
9 more elements
Dependencies are inferred from the claim text.