Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods

A semiconductor device comprising:

• a portion of a semiconductor substrate;
• a gate stack overlying the portion of the semiconductor substrate, wherein the gate stack comprises a first gate stack-forming layer and a second gate stack-forming layer;
• a first sidewall spacer contacting the second gate stack-forming layer, wherein a first surface of the first gate stack-forming layer is self-aligned with a second surface of the first sidewall spacer;
• and
• a second sidewall spacer contacting the first sidewall spacer and the first gate stack-forming layer.

A semiconductor device comprising:

• a semiconductor substrate;
• a gate insulator material overlying the semiconductor substrate;
• a metal gate-forming material overlying the gate insulator material;
• a gate stack-forming layer overlying the metal gate-forming material, the gate stack-forming layer comprising polycrystalline or amorphous silicon;
• a first sidewall spacer contacting the gate stack-forming layer;
• and
• a second sidewall spacer contacting the first sidewall spacer, the gate insulator material, and the metal gate-forming material.