Metallization system of a semiconductor device comprising extra-tapered transition vias

A method, comprising:

• forming a via opening in a dielectric material of a first metallization layer of a semiconductor device, said via opening extending to a first depth and having a first lateral size;
• forming a spacer element on sidewalls of said via opening;
• and
• increasing a depth of said via opening so as to extend to a metal region of a second metallization layer that is formed below said first metallization layer.

A semiconductor device, comprising:

• a first metallization layer formed above a substrate, said first metallization layer comprising a metal line having a first width;
• a second metallization layer formed below said first metallization layer and comprising a second metal line having a second width that is less than said first width;
• and
• a via extending from said first metal line to said second metal line, said via having a first lateral dimension at said first metal line and a second lateral dimension at said second metal line, said second lateral dimension being approximately 60 percent or less of said first lateral dimension.