Semiconductor device
AssigneeHitachi, Ltd.
InventorsKenji MIYAKOSHI, Shinichiro WADA, Junji NOGUCHI, Koichiro MIYAMOTO, Masaya IIDA, Masafumi SUEFUJI
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Abstract
When MOS transistors having a plurality of threshold voltages in which a source and a drain form a symmetrical structure are mounted on the same substrate, electrically-symmetrical characteristics is provided with respect to an exchange of the source and the drain in each MOS transistor. A MOS transistor having a large threshold voltage is provided with a halo diffusion region, and halo implantation is not performed on a MOS transistor having a small threshold voltage.
Claims11
A semiconductor device comprising:
- a first MOS transistor and a second MOS transistor commonly formed on a main surface of a semiconductor substrate of a first conductive type,
- wherein the first MOS transistor includes:
- source and drain regions of a second conductive type;
- a gate electrode provided on the main surface between the source and drain regions interposing a gate insulating film;
- a channel diffusion region of the first conductive type formed on the semiconductor substrate below the gate electrode;
- LDD regions of the second conductive type formed on the semiconductor substrate between the channel diffusion region and the source and drain regions and having an impurity concentration lower than those of the source and drain regions;
- and halo diffusion regions of the first conductive type formed just below the LDD regions and in portions of the source and drain regions,
- wherein the second MOS transistor includes:
- source and drain regions of the second conductive type;
- a gate electrode provided on the main surface between the source and drain regions interposing a gate insulating film;
- a channel diffusion region of the first conductive type formed on the semiconductor substrate below the gate electrode;
- and LDD regions of the second conductive type formed on the semiconductor substrate between the channel diffusion region and the source and drain regions, and
- wherein an impurity concentration of the channel diffusion region of the second MOS transistor is smaller than that of the channel diffusion region of the first MOS transistor, and the second MOS transistor includes no halo diffusion region of the first conductive type just below the LDD regions and in portions of the source and drain regions.
A semiconductor device comprising:
- a first MOS transistor and a second MOS transistor commonly formed on a main surface of a semiconductor substrate of a first conductive type,
- wherein the first MOS transistor includes:
- source and drain regions of a second conductive type;
- a gate electrode provided on the main surface between the source and drain regions interposing a gate insulating film;
- a channel diffusion region of the first conductive type formed on the semiconductor substrate below the gate electrode;
- LDD regions of the second conductive type formed on the semiconductor substrate between the channel diffusion region and the source and drain regions and having an impurity concentration lower than those of the source and drain regions;
- and halo diffusion regions of the first conductive type formed just below the LDD regions and in portions of the source and drain regions,
- wherein the second MOS transistor includes:
- source and drain regions of the second conductive type;
- a gate electrode provided on the main surface between the source and drain regions interposing a gate insulating film;
- a channel diffusion region of the first conductive type formed on the semiconductor substrate below the gate electrode;
- and LDD regions of the second conductive type formed on the semiconductor substrate between the channel diffusion region and the source and drain regions, and
- wherein the second MOS transistor includes no halo diffusion region of the first conductive type just below the LDD regions and in portions of the source and drain regions.
A method of manufacturing a semiconductor device comprising the steps of:
- (a) forming gate electrodes;
- (b) forming a first substrate concentration profile using a first photomask;
- and
- (c) forming a second substrate concentration profile using a second photomask,
- wherein the step (b) and the step (c) form LDD regions of transistors using the gate electrodes formed in the step (a) as masks, respectively, and
- wherein the step (b) forms a halo diffusion region of a transistor using the gate electrode formed at the step (a) as a mask and the step (c) forms no halo diffusion region of a transistor.
Dependencies are inferred from the claim text.