Single-poly eeprom cell and method for fabricating the same

A method comprising:

• forming a deep N well region in a P type semiconductor substrate;
• forming a control gate spaced apart from the N well region;
• forming first and second read transistors in the deep N well region;
• and then
• forming a floating gate connected with the first and second read transistors.

An apparatus comprising:

• a substrate;
• a floating gate formed over the substrate, the floating gate having a main floating gate portion, a first floating gate portion extending from the main floating gate portion and a second floating gate portion extending from the main floating gate portion in a direction parallel to the first floating gate portion;
• a first transistors electronically connected to the floating gate by way of the first floating gate body;
• first and second read transistors electronically connected to the floating gate by way of the first floating gate body;
• and
• a control gate spaced apart from the first transistor and the second transistor and overlapped with the floating gate.