Semiconductor memory device and manufacturing method therefor

A semiconductor memory device comprising:

• a switching transistor provided on a semiconductor substrate;
• a first interlayer dielectric film on the switching transistor;
• a contact plug in the first interlayer dielectric film;
• a ferroelectric capacitor above the contact plug and the first interlayer dielectric film, the ferroelectric capacitor comprising a lower electrode, a ferroelectric film and an upper electrode;
• a diffusion layer in the semiconductor substrate, the diffusion layer electrically connecting the contact plug to the switching transistor;
• a first hydrogen barrier film on a side surface of the ferroelectric capacitor;
• a second hydrogen barrier film on the upper electrode, the second hydrogen barrier film being separately provided from the first hydrogen barrier film;
• a metal plug penetrating the second hydrogen barrier film and contacting the upper electrode;
• and
• an interconnection on the metal plug.

A method of manufacturing a semiconductor memory device, comprising:

• forming a transistor on a semiconductor substrate;
• forming a contact plug connected to either a source or a drain of the transistor;
• forming a ferroelectric capacitor above the contact plug, the ferroelectric capacitor comprising a lower electrode, a ferroelectric film, and an upper electrode;
• forming a hydrogen barrier film on a side surface of the ferroelectric capacitor;
• polishing a residue formed on a side surface of the upper electrode during formation of the ferroelectric capacitor simultaneously with polishing of an upper surface of the upper electrode;
• and
• forming a local interconnection on the upper surface of the upper electrode.

A method of manufacturing a semiconductor memory device, comprising:

• forming a transistor on a semiconductor substrate;
• forming a contact plug connected to either a source or a drain of the transistor;
• forming a ferroelectric capacitor above the contact plug, the ferroelectric capacitor comprising a lower electrode, a ferroelectric film, and an upper electrode;
• forming a first hydrogen barrier film on a side surface of the ferroelectric capacitor;
• polishing a residue formed on a side surface of the upper electrode during formation of the ferroelectric capacitor simultaneously with polishing of an upper surface of the upper electrode;
• forming a second hydrogen barrier film on a top surface of the upper electrode;
• forming a interlayer dielectric film on the second hydrogen barrier film;
• forming a metal plug penetrating the second hydrogen barrier film and the interlayer dielectric film and contacting the upper electrode;
• and
• forming a local interconnection on the metal plug.