Tunnel field effect transistor and method of manufacturing same
AssigneeIntel Corporation
InventorsNiti Goel, Wilman Tsai, Jack Kavalieros
Life of this patent
Estimating the term…
Loading patent…
AssigneeIntel Corporation
InventorsNiti Goel, Wilman Tsai, Jack Kavalieros
Estimating the term…
A TFET includes a source region (110, 210), a drain region (120, 220), a channel region (130, 230) between the source region and the drain region, and a gate region (140, 240) adjacent to the channel region. The source region contains a first compound semiconductor including a first Group III material and a first Group V material, and the channel region contains a second compound semiconductor including a second Group III material and a second Group V material. The drain region may contain a third compound semiconductor including a third Group III material and a third Group V material.
A tunnel field effect transistor comprising:
A tunnel field effect transistor comprising:
A method of manufacturing a tunnel field effect transistor, the method comprising:
A method of manufacturing a planar tunnel field effect transistor, the method comprising:
Dependencies are inferred from the claim text.