Multiple gate transistor having fins with a length defined by the gate electrode

A method of forming a multiple gate transistor, the method comprising:

• forming drain and source regions in a semiconductor layer of said multiple gate transistor on the basis of a gate electrode placeholder structure;
• forming a mask material so as to cover said drain and source regions;
• forming one or more fins in said semiconductor layer so as to connect to said drain and source regions covered by said mask material;
• and
• forming a gate electrode structure above said one or more fins.

A semiconductor device, comprising:

• a continuous drain region and a continuous source region formed in a semiconductor material of a transistor;
• a plurality of fins extending between said drain and source regions, each of said fins having a first end face connecting to said drain region and a second end face connecting to said source region;
• and
• a gate electrode structure formed above said plurality of fins, said gate electrode structure having a first sidewall that is aligned to said first end face and having a second sidewall that is aligned to said second end face.