Semiconductor memory device and manufacturing method thereof
AssigneeKabushiki Kaisha Toshiba
InventorsTakayuki OKADA, Hiroyuki KANAYA
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Abstract
A semiconductor memory device including a ferroelectric capacitor, the ferroelectric capacitor includes a lower electrode having a plurality of protrusions; a ferroelectric film on the lower electrode, the ferroelectric film having a plurality of protrusions engaging with the protrusions of the lower electrode; and an upper electrode on the ferroelectric film, the upper electrode having a plurality of protrusions engaging with the protrusions of the lower electrode.
Claims14
A semiconductor memory device comprising a ferroelectric capacitor, the ferroelectric capacitor comprising:
- a lower electrode comprising a plurality of protrusions;
- a ferroelectric film on the lower electrode, the ferroelectric film comprising a plurality of protrusions configured to engage with the protrusions of the lower electrode;
- and
- an upper electrode on the ferroelectric film, the upper electrode comprising a plurality of protrusions configured to engage with the protrusions of the lower electrode.
A manufacturing method of a semiconductor memory device comprising:
- depositing a material for a lower electrode above a semiconductor substrate;
- forming a sacrificial layer with protrusions on the material for the lower electrode;
- etching the sacrificial layer and the material for the lower electrode in order to transfer a surface profile of protrusions of the sacrificial layer to the lower electrode;
- depositing a ferroelectric film on the lower electrode;
- depositing an upper electrode on the ferroelectric film;
- and
- patterning the upper electrode, the ferroelectric film, and the lower electrode into a pattern of a ferroelectric capacitor.
A manufacturing method of a semiconductor memory device comprising:
- depositing a material for a first lower electrode above a semiconductor substrate;
- forming a sacrificial layer with discontinuous protrusions on the material for the first lower electrode;
- depositing a material for a second lower electrode on the sacrificial layer and the material for the first lower electrode;
- depositing a ferroelectric film on the second lower electrode;
- depositing an upper electrode on the ferroelectric film;
- and
- patterning the upper electrode, the ferroelectric film, and the lower electrode into a pattern of a ferroelectric capacitor.
A manufacturing method of a semiconductor memory device comprising:
- depositing a material for a first lower electrode above a semiconductor substrate;
- forming a sacrificial layer with discontinuous protrusions on the material for the first lower electrode;
- a part of the first lower electrode is etched by using the sacrificial layer as a mask in order to form a groove on a top of the first lower electrode;
- removing the sacrificial layer;
- depositing a material for a second lower electrode on the material for the first lower electrode;
- depositing a ferroelectric film on the second lower electrode;
- depositing an upper electrode on the ferroelectric film;
- and
- patterning the upper electrode, the ferroelectric film, and the lower electrode into a pattern of a ferroelectric capacitor.
Dependencies are inferred from the claim text.