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US 2009/0289299 A1Published application
High density high performance power transistor layout
OwnerLi-Cheng CHEN, Feng-Yuan ANinventors
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Abstract
A power transistor comprises a gate region, a source region, and a drain region. The gate region comprises a first line portion, a second line portion, and a third line portion. The first line portion couples to the second line portion so as to form a first V-shaped structure. The second line portion couples to the third line portion so as to form a second V-shaped structure. The first line portion, the second line portion, and the third line portion form a N-shaped structure.
Claims10
A power transistor comprising:
- a gate region having a first line portion, a second line portion, and a third line portion, wherein the first line portion couples to the second line portion so as to form a first angle, and the second line portion couples to the third line portion so as to form a second angle;
- a source region;
- and
- a drain region, wherein the first line portion and the second line portion form a first V-shaped structure, the second line portion and the third line portion form a second V-shaped structure, and the first line portion, the second line portion, and the third line portion form a N-shaped structure.
1 more element
Dependencies are inferred from the claim text.