Semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorsYoshihiro Minami, Ryo Fukuda, Takeshi Hamamoto
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AssigneeKabushiki Kaisha Toshiba
InventorsYoshihiro Minami, Ryo Fukuda, Takeshi Hamamoto
Estimating the term…
This disclosure concerns a semiconductor memory device including bit lines; word lines; semiconductor layers arranged to correspond to crosspoints of the bit lines and the word lines; bit line contacts connecting between a first surface region and the bit lines, the first surface region being a part of a surface region of the semiconductor layers directed to the word lines and the bit lines; and a word-line insulating film formed on a second surface region adjacent to the first surface region, the second surface region being a part of out of the surface region, the word-line insulating film electrically insulating the semiconductor layer and the word line, wherein the semiconductor layer, the word line and the word-line insulating film form a capacitor, and when a potential difference is given between the word line and the bit line, the word-line insulating film is broken in order to store data.
A semiconductor memory device comprising:
Dependencies are inferred from the claim text.