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US 2008/0303084 A1Published application
Vertical Tunneling Transistor
AssigneeMicron Technology, Inc.
InventorGurtej S. Sandhu
Life of this patent
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Abstract
The disclosed embodiments relate to a vertical tunneling transistor that may include a channel disposed on a substrate. A quantum dot may be disposed so that an axis through the channel and the quantum dot is substantially perpendicular to the substrate. A gate may be disposed so that an axis through the channel, the quantum dot and the gate is substantially perpendicular to the substrate.
Claims22
An electronic device, comprising:
- a memory device that receives information stored on the storage device, the memory device comprising:
- a substrate;
- a plurality of access transistors, each of the plurality of access transistors comprising:
- a channel formed on the substrate;
- a self-aligned island of conductive material formed such that the channel is between the island of conductive material and the substrate;
- a gate formed such that the island of conductive material is between the gate and the channel;
- and
- wherein an axis through the channel, the island of conductive material, and the gate is substantially perpendicular to an upper surface of the substrate;
- and
- a memory array including a plurality of memory cells formed on the substrate, each of the plurality of memory cells comprising of a memory element coupled to one of the plurality of access transistors.
7 more elements
A memory device, comprising:
- a memory element disposed on a substrate;
- and
- an access device coupled to the memory element, the access device comprising:
- a channel formed on the substrate;
- an island of conductive material formed such that an axis through the channel and the island of conductive material is substantially perpendicular to the substrate;
- and
- a gate formed such that an axis through the channel, the island of conductive material and the gate is substantially perpendicular to the substrate.
4 more elements
An integrated circuit device, comprising:
- a substrate;
- and
- a memory array that includes a plurality of memory cells disposed on the substrate, each of the plurality of memory cells comprising a memory element and an access transistor, the access transistor comprising:
- a channel disposed on the substrate;
- a self-aligned island of conductive material disposed so that the channel is between the island of conductive material and the substrate;
- a gate disposed so that the island of conductive material is between the gate and the channel;
- and
- wherein an axis through the channel, the island of conductive material, and the gate is substantially perpendicular to an upper surface of the substrate.
5 more elements
A device comprising:
- a memory element disposed on a substrate, and
- an access device coupled to the memory element, the access device comprising:
- a channel disposed on the substrate;
- an island of conductive material disposed so that the channel is between the island of conductive material and the substrate;
- a gate disposed so that the island of conductive material is between the gate and the channel;
- and
- wherein an axis through the channel, the island of conductive material, and the gate is substantially perpendicular to an upper surface of the substrate.
4 more elements
A vertical tunneling transistor, the vertical tunneling transistor produced by the process of:
- disposing a channel on a substrate;
- disposing a dielectric layer on the substrate;
- providing an aperture with a sidewall in the dielectric layer;
- disposing a spacer adjacent the sidewall in the aperture that reduces a dimension of the aperture that is substantially parallel to the substrate to a sub-photolithographic size;
- disposing an island of conductive material within the aperture so that an axis through the channel and the island of conductive material is substantially perpendicular to the substrate;
- and
- providing a gate so that an axis through the channel, the island of conductive material and the gate is substantially perpendicular to the substrate.
4 more elements
A memory device, comprising:
- a memory element formed on a substrate;
- and
- an access device coupled to the memory element, the access device comprising:
- a channel formed on the substrate;
- a self-aligned island of conductive material formed such that the channel is between the island of conductive material and the substrate;
- a gate formed such that the island of conductive material is between the gate and the channel;
- and
- wherein an axis through the channel, the island of conductive material, and the gate is substantially perpendicular to an upper surface of the substrate.
5 more elements
Dependencies are inferred from the claim text.