Shallow trench isolation structures for semiconductor devices including wet etch barriers and methods of fabricating same

A method of manufacturing of a semiconductor device comprising:

• forming a trench in a substrate;
• forming a sidewall oxide layer on an inner wall of the trench;
• forming a nitride liner on the sidewall oxide layer;
• forming a gap-fill insulating layer on the nitride liner to fill the trench;
• and
• forming an impurity doped oxide layer at an edge region of the sidewall oxide layer adjacent to an entry of the trench by doping an impurity in an exposed portion of the sidewall oxide layer from the entry of the trench.

A semiconductor device comprising:

• a substrate including a trench extending therein from a surface thereof and having a trench wall;
• a sidewall oxide layer on the trench wall that includes a sidewall oxide layer edge that is recessed from the surface of the substrate;
• a nitride liner on the sidewall oxide layer remote from the trench wall that includes a nitride liner edge, wherein the sidewall oxide layer edge is also recessed from the nitride liner edge such that the nitride liner includes a protruding portion relative to the sidewall oxide layer edge;
• a trench insulating layer on the nitride liner remote from the sidewall oxide layer;
• and
• a wet etch barrier layer that extends along the trench wall from the surface of the substrate to the sidewall oxide layer edge, along the sidewall oxide layer edge to the protruding portion of the nitride layer and along the protruding portion of the nitride layer.