Semiconductor device having multiple wiring layers

A semiconductor device comprising:

• a semiconductor substrate having a substrate wiring;
• and
• first and second wiring layers staked on the substrate in this order, wherein
• the substrate wiring is disposed on a principal surface of the substrate,
• the first wiring layer includes:
• a first interlayer insulation film having a first wiring groove with a first via hole, wherein the first via hole penetrates the first interlayer insulation film along with a thickness direction of the first interlayer insulation film so that the first via hole reaches the substrate wiring on the substrate;
• a first copper wiring disposed in the first wiring groove and the first via hole;
• a first inner wall barrier metal layer disposed between an inner wall of the first wiring groove with the first via hole and the first copper wiring, and disposed on a part of the substrate wiring, wherein the part of the substrate wiring is exposed in the first via hole;
• and
• a first upper barrier metal layer disposed on the first interlayer insulation film and covering an upper surface of the first copper wiring,
• the second wiring layer includes:
• a second interlayer insulation film having a second wiring groove with a second via hole, wherein the second via hole penetrates the second interlayer insulation film along with a thickness direction of the second interlayer insulation film so that the second via hole reaches the first upper barrier metal layer in the first wiring layer;
• a second copper wiring disposed in the second wiring groove and the second via hole;
• a second inner wall barrier metal layer disposed between an inner wall of the second wiring groove with the second via hole and the second copper wiring, and disposed on a part of the first upper barrier metal layer, wherein the part of the first upper barrier metal layer is exposed in the second via hole;
• and
• a second upper barrier metal layer disposed on the second interlayer insulation film and covering an upper surface of the second copper wiring,
• the first inner wall barrier metal layer prevents a copper component in the first copper wiring from diffusing into the first interlayer insulation film, and the second inner wall barrier metal layer prevents a copper component in the second copper wiring from diffusing into the second interlayer insulation film,
• the second copper wiring is electrically coupled with the first copper wiring, and
• the first upper barrier metal layer prevents a copper component in the first copper wiring from diffusing into the second interlayer insulation film.