Electronic device including a semiconductor fin having a plurality of gate electrodes and a process for forming the electronic device

A process of forming an electronic device comprises:

• forming a first semiconductor fin over a substrate, wherein the first semiconductor fin includes a first wall and a second wall opposite the first wall;
• forming a gate electrode layer over the first semiconductor fin;
• forming a patterned masking layer over the gate electrode layer including:
• a first masking member including:
• a first portion adjacent to the first wall and overlying a first region of the substrate;
• a second portion adjacent to the second wall and overlying the first region of the substrate;
• a third portion connecting the first portion and the second portion of the first masking member and overlying a second region of substrate;
• and
• an opening over the second region of the substrate;
• removing the third portion of the first masking member;
• and
• removing the gate electrode layer overlying the second region of the substrate to form a first gate electrode along the first wall and a second gate electrode along the second wall.

A process of forming an electronic device comprising:

• forming a first semiconductor fin, wherein from a cross-sectional view, the first semiconductor fin includes a first wall and a second wall opposite the first wall;
• forming a first conductive member including a gate electrode material, wherein the first conductive member includes:
• a first portion adjacent to the first wall, wherein the first portion has a first width;
• a second portion adjacent to the second wall, wherein the second portion has a second width substantially a same width as the first width;
• and
• a third portion overlying the semiconductor fin and connecting the first portion and the second portion, wherein the third portion has a third width less than each of the first width and the second width;
• and
• reacting the third portion of the first conductive member to form a first gate electrode adjacent to the first wall and a second gate electrode adjacent to the second wall, wherein reacting the third portion includes converting substantially all of the third portion to an insulating portion.