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US 2008/0185568 A1Published application
Nonvolatile memory devices and method of manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsYong-wook Kwon, Chul-soon Kwon, Young-cheon Jeong
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Abstract
Example embodiments provide a nonvolatile memory device using resistive elements. The nonvolatile memory device may include a semiconductor substrate, a plurality of variable resistance patterns on the semiconductor substrate, and a plurality of heat sink patterns that are level with the variable resistance patterns and coupled to a ground voltage.
Claims26
A nonvolatile memory device comprising:
- a semiconductor substrate;
- a plurality of variable resistance patterns on the semiconductor substrate;
- and
- a plurality of heat sink patterns level with the variable resistance patterns, the heat sink patterns being coupled to a ground voltage.
1 more element
A nonvolatile memory device comprising:
- a semiconductor substrate;
- access transistors including gate electrodes and first and second junction regions, the gate electrodes on the semiconductor substrate, and the first and second junction regions in the semiconductor on both ends of the gate electrodes;
- a ground voltage line coupled to the first junction region;
- variable resistance patterns coupled to the second junction region;
- and
- heat sink patterns coupled to the ground voltage line, the heat sink patterns being adjacent to the variable resistance patterns.
3 more elements
A nonvolatile memory device comprising:
- a semiconductor substrate;
- first and second access transistors including:
- first and second gate electrodes on the semiconductor substrate to extend in a first direction,
- a first junction region in the semiconductor substrate between the first and second gate electrodes,
- a second junction region in one side of the first gate electrode opposite to the first junction region, and
- a third junction region in one side of the second gate electrode opposite to the first junction region;
- a ground voltage line coupled to the first junction region, the ground voltage line extending in the first direction;
- first and second variable resistance patterns coupled to the second and third junction regions, respectively;
- and
- heat sink patterns coupled to the ground voltage line, the heat sink patterns being formed between the first and second variable resistance patterns so as to extend in the first direction.
7 more elements
A method of manufacturing a nonvolatile memory device, the method comprising:
- forming access transistors, which include gate electrodes formed on a semiconductor substrate and first and second junction regions formed in the semiconductor substrate on both ends of the gate electrodes;
- forming a ground voltage line coupled to the first junction region and landing pads coupled to the second junction region;
- forming variable resistance patterns on the landing pads;
- and
- forming heat sink patterns on the ground voltage line so that the heat sink patterns are adjacent to the variable resistance patterns.
2 more elements
Dependencies are inferred from the claim text.