CMP method providing reduced thickness variations
AssigneeSamsung Electronics Co., Ltd.
InventorsIlyoung Yoon, Jae Ouk Choo, JaEung Koo
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Abstract
A chemical mechanical polishing (CMP) method is disclosed for use in the fabrication of a semiconductor device having dense and sparse regions. The method uses an abrasive stop layer formed on the dense and sparse regions to control polishing of a material layer formed on the abrasive stop layer by a rigid, fixed abrasive polishing pad.
Claims26
A chemical mechanical polishing (CMP) method adapted for use in the fabrication of a semiconductor device, the method comprising:
- contacting a material layer disposed on a working surface of a substrate with a rigid, fixed abrasive polishing pad to planarize the material layer by removing a portion of the material layer until a portion of an abrasive stop layer disposed under the material layer is exposed.
A method of fabricating a semiconductor device on a substrate, the substrate including dense and sparse regions, and the method comprising:
- forming an abrasive stop layer on the dense and sparse regions;
- forming a material layer on the abrasive stop layer;
- and,
- planarizing the material layer with a rigid, fixed abrasive polishing pad until a portion of the abrasive stop layer on the dense region is exposed.
A method of fabricating a semiconductor device disposed in a dense region and a sparse region of a substrate, the method comprising:
- forming an abrasive stop layer on at least the dense region of the substrate;
- forming a first interlayer dielectric layer on the substrate to cover the abrasive stop layer in the dense region and the sparse region;
- while introducing a slurry comprising a passivation agent selected in relation to the abrasive stop layer, planarizing the first interlayer dielectric layer using a rigid, fixed abrasive polishing pad until the abrasive stop layer is exposed;
- and,
- after planarizing the first interlayer dielectric layer, forming a uniformly thick second interlayer dielectric layer on the substrate.
The fabrication method of claim-24, wherein the planarizing of the first interlayer dielectric layer further comprises:
- removing material from the first interlayer dielectric layer at a third removal rate less than the second removal rate after the rigid, fixed abrasive polishing pad makes contact with abrasive stop layer.
Dependencies are inferred from the claim text.