Electrostatic discharge protection circuit using zener triggered silicon controlled rectifier

Abstract

Provided is an electrostatic discharge (ESD) protection circuit using a silicon controlled rectifier (SCR), which is applied to a semiconductor integrated circuit (IC). The ESD protection circuit using an SCR includes: a semiconductor substrate including a first well and a second well; first and second heavily doped regions disposed in an upper portion of the first well; third and fourth heavily doped regions disposed in an upper portion of the second well; a fifth heavily doped region disposed at an interface between the first and second wells; a sixth heavily doped region disposed beside the fifth heavily doped region in the upper portion of the second well; a first overload preventing unit having a drain connected to the sixth heavily doped region, a source connected to the first and second heavily doped regions, and a gate connected to the first and second heavily doped regions through a first resistor; and a second overload preventing unit having a drain connected to the fifth heavily doped region, a source connected to the third and fourth heavily doped regions, and a gate connected to the third and fourth heavily doped regions through a second resistor.

Dependencies are inferred from the claim text.