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US 2006/0033177 A1Published application
Integrated circuit resistor
AssigneeRaytheon Company
InventorsDavid Heston, Jon Mooney
Life of this patent
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Abstract
An integrated circuit resistor is provided that comprises a mesa 14 between electrical contacts 16 and 18. The electrical resistance between electrical contacts 16 and 18 is selectively increased through the formation of recesses 20 and 22 in the mesa 14. The size of recesses 20 and 22 can be used to tune the value of the electrical resistance between contacts 16 and 18.
Claims19
An integrated circuit device, comprising:
- a semiconductor substrate comprising a first outer surface;
- a semiconductor layer formed outwardly from the first outer surface and comprising a second outer surface and defining a recess in the second outer surface;
- first and second contacts formed outwardly from the second outer surface and defining between the contacts a resistive area, the electrical resistance of the resistive area increased through the formation of the recess through the removal of selective portions of the semiconductor layer.
A method of forming an integrated circuit device comprising:
- forming a semiconductor layer on an outer surface of a semiconductor substrate;
- forming electrical contacts on the outer surface of the semiconductor layer spaced apart from one another and defining between the contacts a resistive area;
- and
- forming a recess in the outer surface of the semiconductor layer by removing selected portions of the semiconductor layer in the resistive area to increase the electrical resistance between the electrical contacts through the resistive area.
1 more element
A method of forming an integrated circuit device comprising:
- forming a semiconductor layer on an outer surface of a semiconductor substrate comprising first and second etch stop layers;
- forming electrical contacts on the outer surface of the semiconductor layer spaced apart from one another and defining between the contacts a resistive area;
- forming a first recess in the outer surface of the semiconductor layer by etching portions of the semiconductor layer disposed outwardly from the second etch stop layer in the resistive area to increase the electrical resistance between the electrical contacts through the resistive area;
- and
- forming a second recess in the outer surface of the semiconductor layer by etching portions of the semiconductor layer disposed outwardly from the first etch stop layer in the resistive area in the first recess to further increase the electrical resistance between the electrical contacts through the resistive area.
2 more elements
Dependencies are inferred from the claim text.