Writing to ferroelectric memory devices

A method of writing to a selected ferroelectric memory cell in an array of ferroelectric memory cells, the method comprising:

• applying a ground potential to a first word line coupled to a control gate of the selected memory cell;
• applying approximately 1/2 a programming voltage to other word lines coupled to control gates of non-selected memory cells not associated with the first word line, wherein a voltage across a ferroelectric layer of each memory cell equal to approximately 1/3 the programming voltage is sufficient to cause a reversal of polarity of each memory cell;
• applying the programming voltage to a first program line coupled to a first source/drain region of the selected memory cell and to a first bit line coupled to a second source/drain region of the selected memory cell;
• and
• applying approximately 1/2 the programming voltage to other program lines coupled to first source/drain regions of non-selected memory cells not associated with the first program line and to other bit lines coupled to second source/drain regions of non-selected memory cells not associated with the first bit line.

A method of writing to a selected ferroelectric memory cell in an array of ferroelectric memory cells, the method comprising:

• applying a ground potential to a first word line coupled to a first row of the array;
• applying a fraction of a programming voltage to other word lines respectively coupled to other rows of the array;
• applying the programming voltage to a first program line coupled to a first column of the array and to a first bit line coupled to the first column of the array;
• and
• applying the fraction of the programming voltage to other program lines respectively coupled to other columns of the array and to other bit lines respectively coupled to the other columns of the array;
• wherein the selected memory cell is located in the first row and first column of the array at an intersection of the first bit line and first word line, the change in the voltage across the selected memory cell is sufficient to cause a reversal of polarity of the selected memory cell.