US 2005/0037581 A1 · Multibit ROM cell and method therefor

Abstract

To increase the density of memory cells, a multibit memory cell (10, 50, 80, 110) can be manufactured by preventing the formation of at least one of the extension regions usually formed for the source or drain region. In one embodiment, a single mask (24) blocks the doping of the extension regions during ion implantation. If a tilt implantation process is used to form desired extension regions, two masks may be used. The process can also be integrated into a disposable spacer process. By blocking the extension region for a current electrode, a programmable region (32, 76, 102, 132) is formed adjacent a current electrode. The programmable region enables a two-bit memory cell to be formed.

Claims35

Dependent claims

A method for selectively programming a first bit and a second bit of a memory cell, wherein the memory cell comprises:

a semiconductor substrate;
a gate stack having a first sidewall opposite a second sidewall;
a first doped region within the semiconductor substrate separated from the first sidewall of the gate stack by a first programming region;
and
a second doped region within the semiconductor substrate and substantially adjacent the second sidewall of the gate stack, wherein:
the second doped region and the first doped region are of the same conductivity type;
and
the second doped region is separated from the second sidewall of the gate stack by a second programming region;
wherein the method the method comprises:
selectively implanting into the first programming region to determine a logic state of the first bit;
and
selectively implanting into the second programming region to determine the logic state of the second bit.

9 more elements

A method for forming a memory cell and a method for programming the memory cell, wherein the method of forming the memory cell comprises:

providing a semiconductor substrate;
forming a gate stack having a first sidewall opposite a second sidewall, wherein forming the gate stack comprises:
forming a gate dielectric over the semiconductor substrate;
and
forming a control electrode over the gate dielectric;
forming a first doped region within the semiconductor substrate separated from the first sidewall of the gate stack by a first programming region;
and
forming a second doped region within the semiconductor substrate and substantially adjacent the second sidewall of the gate stack, wherein:
the second doped region and the first doped region are of the same conductivity type;
and
the second doped region is separated from the second sidewall of the gate stack by a second programming region;
wherein the method of programming the memory cell comprises:
selectively implanting into the first programming region to determine a logic state of the first bit;
and
selectively implanting into the second programming region to determine the logic state of the second bit.

12 more elements

A method of forming a memory cell comprising a first bit and a second bit that are programmed, comprising:

providing a semiconductor substrate;
forming a gate stack having a first sidewall opposite a second sidewall, wherein forming the gate stack comprises:
forming a gate dielectric over the semiconductor substrate;
and
forming a control electrode over the gate dielectric;
selecting between performing and not performing a first implant, wherein the first implant is into a first programming region within the semiconductor substrate and substantially adjacent the first sidewall of the gate stack to program the first bit to a first logic state;
forming a first heavily-doped region within the semiconductor substrate and separated from the first sidewall of the gate stack by the first programming region;
selecting between performing and not performing a second implant, wherein the second implant is into a first programming region within the semiconductor substrate and substantially adjacent the second sidewall of the gate stack to program the second bit to a first logic state;
forming a second heavily-doped region within the semiconductor substrate and separated from the second sidewall of the gate stack by the second programming region, wherein:
the second heavily-doped region and the first heavily-doped region are of the same conductivity type.

7 more elements

Dependencies are inferred from the claim text.

Multibit ROM cell and method therefor

Life of this patent

Multibit ROM cell and method therefor

Life of this patent

Abstract

Claims35