Memory cell
AssigneeInfineon Technologies AG
InventorsJoachim Deppe, Christoph Kleint, Christoph Ludwig
Life of this patent
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Abstract
In a memory cell, in a trench, a layer sequence comprising a first oxide layer, a nitride layer provided on the first oxide layer, and a second oxide layer, facing the gate electrode, and provided at the lateral trench walls, while the nitride layer is absent in a curved region of the trench bottom. In an alternative configuration, in each case at least one step is formed at the lateral walls of the trench, preferably below the source region or the drain region, respectively.
Claims6
A memory cell having a memory transistor, which has, at a top side of a semiconductor body or a semiconductor layer, a gate electrode in a trench formed in the semiconductor material, which gate electrode is arranged between a source region and a drain region, which are formed in the semiconductor material, and is isolated from the semiconductor material by dielectric material, wherein, between the source region and the gate electrode and between the drain region and the gate electrode, there is a layer sequence comprising:
- a first oxide layer facing the semiconductor material;
- a nitride layer provided on the first oxide layer;
- and
- a second oxide layer, facing the gate electrode, and provided at least at the lateral walls of the trench,
- wherein the nitride layer is absent in a curved region of the trench bottom.
A memory cell having a memory transistor, which has, at a top side of a semiconductor body or a semiconductor layer, a gate electrode in a trench formed in the semiconductor material, which gate electrode is arranged between a source region and a drain region, which are formed in the semiconductor material, and is isolated from the semiconductor material by dielectric material, wherein, between the source region and the gate electrode and between the drain region and the gate electrode, there is a layer sequence comprising:
- a first oxide layer, facing the semiconductor material;
- a nitride layer provided on the first oxide layer;
- and
- a second oxide layer, facing the gate electrode, and provided at least at the lateral walls of the trench,
- wherein at least one step is formed in each of the lateral walls of the trench.
Dependencies are inferred from the claim text.