Method to increase the etch rate and depth in high aspect ratio structure

In the fabrication of a memory cell comprising a transistor and a deep trench capacitor, the method of forming the deep trench for the capacitor comprising the steps of

• providing a semiconductor having an upper surface and with a patterned mask on said surface, the mask formed with a top layer and having at least one opening where the upper surface of the semiconductor substrate is exposed;
• etching said semiconductor substrate at said opening by plasma etching to from a trench in said substrate at said opening;
• contacting said trench with a fluorine-containing plasma at reduced pressure and power compared to said prior etching step to form the trench, whereby a passivation film formed at the bottom of the trench during the prior etching step is removed;
• further etching said semiconductor substrate at said opening to deepen said trench;
• repeating the passivation film removal steps and etching until the desired depth of the trench has been achieved and before erosion of the top layer of the mask;
• removing the passivation film from side walls and bottom of the trench;
• forming an insulating layer on the side walls and bottom of the trench;
• and
• filling the trench with a conductive material.