Patterned SOI by formation and annihilation of buried oxide regions during processing
AssigneeInternational Business Machines Corporation
InventorsTze-Chiang Chen, Devendra K. Sadana
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AssigneeInternational Business Machines Corporation
InventorsTze-Chiang Chen, Devendra K. Sadana
Estimating the term…
A method of fabricating a silicon-on-insulator (SOI) substrate including an ultra-thin top Si-containing layer and at least one patterned buried semi-insulating or insulating region having well defined edges is provided. The method includes a step of implanting first ions into a surface of a Si-containing substrate so as to form a first implant region of the first ions in the Si-containing substrate. Following the implantation of first ions, a first annealing step is performed which forms a buried semi-insulating or insulating region within the Si-containing substrate. Next, second ions that are insoluble in the semi-insulating or insulating region are selectively implanted into portions of the buried semi-insulating or insulating region. After the selective implant step, a second annealing step is performed which recrystallizes the buried semi-insulating or insulating region that includes second ions to the same crystal structure as the original Si-containing substrate.
A method of fabricating a silicon-on-insulator (SOI) substrate comprising an ultra-thin top Si-containing layer and at least one patterned buried semi-insulating or insulating region having well defined edges, said method comprising the steps of:
A method of fabricating a silicon-on-insulator (SOI) substrate comprising an ultra-thin top Si-containing layer and at least one patterned buried semi-insulating or insulating region having well defined edges, said method comprising the steps of:
A method of fabricating a silicon-on-insulator (SOI) substrate comprising an ultra-thin top Si-containing layer and at least one patterned buried semi-insulating or insulating region having well defined edges, said method comprising the steps of:
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Preparing SOI wafers: using silicon implanted buried insulating layers, e.g. oxide layers [SIMOX]
Isolation regions comprising dielectric materials: semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
Generic processes or apparatus for the manufacture or treatment of devices covered
Generic packages, interconnections, connectors or other constructional details of devices covered by
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The present invention relates to silicon-on-insulator (SOI) substrates for semiconductor integrated circuits (ICs), and more particularly to a method of fabricating an SOI substrate which includes an ultra-thin top Si-containing layer (on the order of about 2000 Å or less) and at least one patterned buried semi-insulating or insulating region such as a buried oxide (BOX) region which has well defined edges that are suitable for sub-micron geometries.
Separation by implantation of oxygen (SIMOX) is a technique employed in the semiconductor industry in fabricating SOI substrates that can be used in the manufacturing of ICs. SIMOX typically involves using high-energy ions to implant a large dose of oxygen ions beneath the surface of a bulk Si-containing wafer. Upon high-temperature annealing, the implanted oxygen ions form a continuous BOX region which electrically isolates the Si at the surface (i.e., top or-superfacial Si layer). Typically, prior art SIMOX processes have been used to fabricate SOIs with a top Si layer and a BOX thickness of several thousand angstroms.
In some applications, it is desirable to form discrete and isolated BOX regions within a Si-containing substrate while not forming BOX regions in other portions of the same Si-containing substrate. Hence, there is a growing need for providing patterned SOI regions. Patterned SOI regions formed within a Si-containing substrate are especially needed for future high performance Si-containing ICs, optical communication devices and three-dimensional device and circuit integration.
FIGS. 1A-1F are pictorial representations (through cross-sectional views) showing the various processing steps employed in one embodiment of the present invention which is used in forming an SOI substrate having at least one patterned buried semi-insulating or insulating region that has well defined edges associated therewith.
FIGS. 2A-2F are pictorial representations (through cross-sectional views) showing the various processing steps employed in another embodiment of the present invention which is used in forming an SOI substrate having at least one patterned buried semi-insulating or insulating region that has well defined edges associated therewith.
The present invention, which provides a method of fabricating an SOI substrate having an ultra-thin top Si-containing layer and at least one patterned buried semi-insulating or insulating region, will now be described in greater detail by referring to the drawings that accompany the present application.
Reference is first made to FIGS. 1A-1F which show the various processing steps that are employed in one embodiment of the present invention wherein an SOI substrate having an ultra-thin top Si-containing layer and at least one patterned buried semi-insulating or insulating region that has well defined edges is fabricated. Specifically, FIG. 1A illustrates the first processing step of the present invention wherein first ions 12 are implanted into a surface of Si-containing substrate 10 under conditions wherein an implant region of first ions (labeled as 14) is formed within the Si-containing substrate. The first ions may be implanted using a continuous or pulse ion implantation process wherein various doses of first ions 12 can be employed.
The term “Si-containing substrate” as used herein denotes any Si-containing material including, but not limited to: Si, SiGe, SiC, SiCGe, nitrogen doped Si, Si/Si and Si/SiGe. A preferred Si-containing substrate employed in the present invention is a Si wafer. The Si-containing substrate may be undoped or doped (n or p-type) depending on the future use of the SOI wafer.