Stacked metal-insulator-metal capacitor structures in between interconnection layers

Abstract

A parallel capacitor structure that can be fabricated using advanced processing techniques that employ, for example, copper interconnects and low k dielectrics is described. The parallel capacitor structure includes a first copper dual Damascene interconnection line, a first interconnection, a middle capacitor electrode, a dielectric layer, a second interconnection, an upper capacitor electrode, and a second interlayer dielectric layer. The existing first copper dual Damascene interconnection line is embedded in a first interlayer dielectric layer, and is utilized as a lower capacitor electrode. The middle capacitor electrode is on the first copper dual Damascene interconnection line. The dielectric layer is interposed between the first copper dual Damascene interconnection line and the middle capacitor electrode. The second interconnection can be directly connected to the middle capacitor electrode. The first interconnection connects the upper capacitor electrode to the first copper dual Damascene interconnection line. The second interlayer dielectric layer is interposed between the middle capacitor electrode and the upper capacitor electrode. When a potential having a first polarity is applied to the upper capacitor electrode and to the first copper dual Damascene interconnection line, and a potential having a second polarity, opposite the first polarity, is applied to the middle capacitor electrode, this structure functions as a parallel capacitor. By using an existing first copper dual Damascene interconnection line as a lower capacitor electrode, the capacitance per unit area can be increased without substantially increasing manufacturing complexity.

Dependencies are inferred from the claim text.