US 2003/0077889 A1Published application

Method for manufacturing a semiconductor device

AssigneeHynix Semiconductor Inc.

InventorJu-wan Ko

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Abstract

Disclosed is a method for manufacturing a semiconductor device. The source/drain impurity area is formed by using the open base characteristic, the ion implantation of high density impurities for connecting source/drain is performed, the first contact hole, the non-crystalline poly-silicon layer and the PMD layer are formed consecutively, the ion implantation is performed, and then the metal lines are formed. Therefore, there are advantages in that the size of the chip is reduced as the coding is performed by using the first contact hole without any coding area, the damage to the semiconductor substrate is reduced and the leakage current is reduced as the first contact hole is formed before the deposition of PMD, the ON characteristic can be achieved by the reverse type ion implantation to the OFF characteristic, which is contrary to the case of a general ROM coding, and the cutting of the metal line is minimized as the poly-silicon layer is formed under the metal line layer during the deposition of the metal lines.

Claims7

Dependent claims

A method for manufacturing a semiconductor device comprises:

depositing a gate oxidation layer on a semiconductor substrate having a lower construction;
forming a first contact hole for connecting elements electrically, by a wet etching of an area to be used as a ROM coding area on the gate oxidation layer;
depositing a doped poly-silicon layer on a result formed with the first contact hole;
forming a gate electrode and a first metal line by patterning a part of the poly-silicon layer to be used as a metal line;
performing an ion implantation of low-density impurities connecting a source/drain area whereby the source/drain impurity areas are formed on both sides of the gate electrode on the semiconductor substrate;
depositing a nitride layer on an entire surface of the semiconductor substrate and forming nitride spacers at both sides of the gate electrode by etching the nitride layer;
masking a part for ROM coding on a result formed with the nitride spacers, and performing an ion implantation of high-density impurities on an area other than a ROM coding transistor;
depositing a PMD on a resulting structure that the ion implantation of high-density impurities has been performed, and forming a second contact hole by a photolithography process;
forming a resist pattern on the result formed with the second contact hole, and forming a ROM coding by ion implantation by using the resist pattern as a mask;
and
depositing a metal to be used as a metal line on the result, and forming a second metal line by patterning through a photolithography process.

8 more elements

Dependencies are inferred from the claim text.