Mask pattern generating method and manufacturing method of semiconductor apparatus
AssigneeKabushiki Kaisha Toshiba
InventorsToshiya Kotani, Satoshi Tanaka, Soichi Inoue, Sachiko Kobayashi, Hirotaka Ichikawa
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AssigneeKabushiki Kaisha Toshiba
InventorsToshiya Kotani, Satoshi Tanaka, Soichi Inoue, Sachiko Kobayashi, Hirotaka Ichikawa
Estimating the term…
A mask pattern generation method of generating a mask pattern from a designed pattern, comprising preparing the designed pattern, preparing a correction parameter, preparing a first correction library in which a plurality of pairs of an edge coordinate group and a correction value group to correct the edge coordinate group is registered, acquiring edge coordinate groups of the designed patterns, generating a second correction library in which only the plurality of pairs of an edge coordinate group agreeing with the acquired edge coordinate group and the correction value group is registered in the first correction library and simulation using the correction parameter, and correcting the designed pattern using the second correction library.
A mask pattern generation method of generating mask patterns from designed patterns, comprising:
A mask pattern generation method of generating mask patterns from designed patterns, comprising:
A mask pattern generation method of generating a mask pattern from a designed pattern, comprising:
Dependencies are inferred from the claim text.