Single rie process for mimcap top and bottom plates
AssigneeInfineon Technologies North America Corp.
InventorXian J. Ning
Life of this patent
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Abstract
A method of forming MIM capacitor top (16) and bottom (12) plates, using a first and second resist (18/20) and a single RIE process. A first conductive layer (12) is deposited over a substrate (10). An insulating layer (14) is deposited over the first conductive layer (12). A second conductive layer (16) is deposited over the insulating layer (14). A first resist (18) is deposited over the second conductive layer (16), and the first resist (18) is patterned. A second resist (20) is deposited over the first resist (18) and patterned. The first and second resist (18/20) patterns are simultaneously transferred to the first and second conductive layers (12) and (16), respectively, by exposure to a single reactive ion etch (RIE) process.
Claims17
A method of patterning metal layers of a semiconductor wafer, the method comprising:
- depositing a first conductive layer over a substrate;
- depositing an insulating layer over the first conductive layer;
- depositing a second conductive layer over the insulating layer;
- depositing a first resist over the second conductive layer;
- depositing a second resist over the first resist;
- patterning the first resist with a first pattern and patterning the second resist with a second pattern;
- and
- simultaneously transferring the first pattern to the first conductive layer and the second pattern to the second conductive layer.
A method of patterning metal layers of a semiconductor wafer, the wafer comprising a first conductive layer, an insulating layer disposed over the first conductive layer and a second conductive layer disposed over the insulating layer, the method comprising:
- depositing a first resist over the second conductive layer;
- patterning the first resist with a first pattern;
- depositing a second resist over the first resist;
- patterning the second resist with a second pattern;
- simultaneously transferring the first pattern to the first conductive layer and transferring the second pattern to the second conductive layer.
A method of forming capacitive plates of a MIM capacitor, comprising:
- providing a wafer having a substrate;
- depositing a first conductive layer on the substrate;
- depositing a capacitor dielectric layer over the first conductive layer;
- depositing a second conductive layer over the capacitor dielectric layer;
- depositing a first resist over the second conductive layer;
- patterning the first resist with a first pattern;
- depositing a second resist over the first resist;
- patterning the second resist with a second pattern;
- simultaneously transferring the first pattern to the first conductive layer and transferring the second pattern to the second conductive layer.
Dependencies are inferred from the claim text.