Control of transistor performance through adjustment of spacer oxide profile with a wet etch

A method of fabricating a circuit device, comprising:

• forming a gate on a substrate;
• forming an oxide layer over the gate;
• anisotropically etching the oxide layer to define a first oxide spacer and a second oxide spacer adjacent to the gate;
• measuring the width of the gate and the first and second oxide spacers;
• and
• trimming the widths of the first and second oxide spacers if the width of the gate and the first and second oxide spacers exceeds a preselected maximum value by exposing the first and second oxide spacers to a solution of NH4OH, H2O2 and H2O for a preselected time and rinsing with deionized water.

A method of fabricating a circuit device, comprising:

• forming a gate on a substrate;
• forming an oxide layer over the gate;
• anisotropically etching the oxide layer to define a first oxide spacer and a second oxide spacer adjacent to the gate;
• measuring the width of the gate and the first and second oxide spacers;
• trimming the widths of the first and second oxide spacers if the width of the gate and the first and second oxide spacers exceeds a preselected maximum value by exposing the first and second oxide spacers to a solution of NH4OH, H2O and H2O for a preselected time and rinsing with deionized water;
• forming a third spacer adjacent to the first spacer and a fourth spacer adjacent to the second spacer;
• measuring the width of the gate and the first, second, third and fourth oxide spacers;
• and
• trimming the widths of the third and fourth oxide spacers if the width of the gate and the first, second, third and fourth oxide spacers exceeds a preselected maximum value by exposing the third and fourth oxide spacers to a solution of NH4OH, H2O2 and H2O for a preselected time and rinsing with deionized water.