High voltage semiconductor device and method for manufacturing the same

A method for manufacturing a semiconductor device comprising:

• forming a high resistance layer of a first conductivity type on a main surface of a first buffer layer of the first conductivity type, an impurity concentration of the high resistance layer being lower than that of the first buffer layer;
• forming a base layer of a second conductivity type in a surface region of the high resistance layer;
• forming a source region of the first conductivity type in a surface region of the base layer;
• forming a gate electrode insulated from the source region, the base layer and the high resistance layer;
• lapping a rear surface of the first buffer layer;
• injecting impurities through the rear surface of the first buffer layer, thereby forming a second buffer layer of the first conductivity type, an impurity concentration of the second buffer layer being higher than that of the first buffer layer;
• and
• forming a drain layer of the second conductivity type on a rear surface of the second buffer layer.

A method for manufacturing a semiconductor device comprising:

• forming a first buffer layer of a first conductivity type on a first surface of a first substrate of the first conductivity type having a high resistance;
• forming a first insulating film on the first surface of the first substrate;
• joining the first substrate to a second substrate, the second substrate having a second insulating film on a first surface thereof, the second insulating film being brought into contact with the first insulating film;
• lapping a second surface of the first substrate to a thickness that corresponds to a predetermined withstand voltage, the second surface being opposite to the first surface;
• forming a MOS gate structure including a base region, a source region and a gate electrode on the second surface of the first substrate;
• removing the second substrate and the first and second insulating films;
• forming a drain layer of a second conductivity type on the first surface of the first substrate, the drain layer being formed in a portion shallower than the first buffer layer;
• and
• forming a second buffer layer of the first conductivity type between the first buffer layer and the drain layer, an impurity concentration of the second buffer layer being higher than that of the first buffer layer.

A method for manufacturing a semiconductor device comprising:

• forming a first insulating film on a first surface of a first substrate having a high resistance;
• joining the first substrate to a second substrate, the second substrate having a second insulating film on a first surface thereof, the second insulating film being brought into contact with the first insulating film;
• lapping a second surface of the first substrate to a thickness that corresponds to a predetermined withstand voltage, the second surface being opposite to the first surface;
• forming a MOS gate structure including a base region, a source region and a gate electrode on the second surface of the first substrate;
• removing the second substrate and the first and second insulating films;
• forming a first buffer layer of a first conductivity type on the first surface of the first substrate;
• forming a drain layer of a second conductivity type on the first surface of the first substrate, the drain layer being formed in a portion shallower than the first buffer layer;
• and
• forming a second buffer layer of the first conductivity type between the first buffer layer and the drain layer, an impurity concentration of the second buffer layer being higher than that of the first buffer layer.

A method for manufacturing a semiconductor device comprising:

• forming a first buffer layer of a first conductivity type and a drain layer of a second conductivity type on a first surface of a first substrate having a high resistance;
• forming a first insulating film covering the drain layer on the first surface of the first substrate;
• joining the first substrate to a second substrate, the second substrate having a second insulating film on a first surface thereof, the second insulating film being brought into contact with the first insulating film;
• lapping a second surface of the first substrate to a thickness that corresponds to a predetermined withstand voltage, the second surface being opposite to the first surface;
• forming a MOS gate structure including a base region, a source region and a gate electrode on the second surface of the first substrate;
• removing the second substrate and the first and second insulating films;
• and
• forming a second buffer layer of the first conductivity type between the first buffer layer and the drain layer, an impurity concentration of the second buffer layer being higher than that of the first buffer layer.

A method for manufacturing a semiconductor device comprising:

• forming an insulating film in a portion of a first depth from a first surface of a substrate having a first impurity concentration;
• forming a semiconductor layer of a first conductivity type on the first surface, the semiconductor layer having a thickness that corresponds to a predetermined withstand voltage and a second impurity concentration lower than the first impurity concentration;
• forming a MOS gate structure including a base region, a source region and a gate electrode in the semiconductor layer;
• removing a second surface of the substrate and the insulating film, the second surface being opposite to the first surface;
• forming a first buffer layer of the first conductivity type and a drain layer of a second conductivity type on the first surface, the drain layer being formed in a portion shallower than the first buffer layer;
• and
• forming a second buffer layer of the first conductivity type between the first buffer layer and the drain layer, an impurity concentration of the second buffer layer being higher than that of the first buffer layer.

A method for manufacturing a semiconductor device comprising:

• forming a porous silicon layer on a surface of a substrate;
• forming a semiconductor layer of a first conductivity type on the porous silicon layer, the semiconductor layer having a thickness that corresponds to a predetermined withstand voltage and a first impurity concentration;
• forming a MOS gate structure including a base region, a source region and a gate electrode on a first surface of the semiconductor layer, the first surface being opposite to the porous silicon layer;
• removing the substrate and the porous silicon layer;
• forming a first buffer layer of the first conductivity type and a drain layer of a second conductivity type on a second surface of the semiconductor layer, the second surface being opposite to the first surface and the drain layer being formed in a portion shallower than the first buffer layer;
• and
• forming a second buffer layer of the first conductivity type between the first buffer layer and the drain layer, an impurity concentration of the second buffer layer being higher than that of the first buffer layer.