Scribe line structure for preventing from damages thereof induced during fabrication
AssigneeWinbond Electronics Corp.
InventorsCHI-FA LIN, WEI-TSU TSENG, MIN-SHINN FENG
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AssigneeWinbond Electronics Corp.
InventorsCHI-FA LIN, WEI-TSU TSENG, MIN-SHINN FENG
Estimating the term…
A scribe line structure of a semiconductor wafer is provided in the invention. The semiconductor wafer has a plurality of substantially parallel horizontal scribe lines and a plurality of substantially parallel vertical scribe lines to separate a plurality of chips from each other. According to the invention, each parallel horizontal scribe line and each parallel vertical scribe line are divided along two elongated sides thereof into a plurality of portions with the same rectangular area. Each of the plurality of portions of each scribe line is composed of the scribe line structure. The scribe line structure comprises a multi-layer structure with four sides formed over whole area of each portion of each scribe line and at least two rows of cavities formed along the four sides of the multi-layer structure. The cavities of the scribe line structure are capable of relieving internal stress of the scribe lines and arresting possible cracks induced during scribe line manufacture. Thereby, peeling, delamination and dielectric fracture of the scribe lines induced during the wafer manufacture can be prevented.
In a semiconductor wafer with a plurality of substantially parallel horizontal scribe lines and a plurality of substantially parallel vertical scribe lines separating a plurality of chips from each other, two adjacent parallel horizontal scribe lines and two adjacent parallel vertical scribe lines surrounding one corresponding chip, and forming four surrounding scribe line, a crack-arresting structure being formed along each surrounding scribe line, said crack-arresting structure comprising at least two rows of cavities, wherein said crack-arresting structure is capable of relieving internal stress of the scribe lines and arresting possible cracks induced during scribe line manufacture to prevent from damages of the scribe lines.
A scribe line structure of a semiconductor wafer, said semiconductor wafer having a plurality of substantially parallel horizontal scribe lines and a plurality of substantially parallel vertical scribe lines separating a plurality of chips from each other, each parallel horizontal scribe line and each parallel vertical scribe line having two elongated sides and being divided along the elongated sides into a plurality of portions with the same rectangular area, each of the plurality of portions of each scribe line being composed of said scribe line structure, said scribe line structure comprising:
A method for fabricating a scribe line structure of a semiconductor wafer, said semiconductor wafer having a plurality of substantially parallel horizontal scribe lines and a plurality of substantially parallel vertical scribe lines separating a plurality of chips from each other, each parallel horizontal scribe line and each parallel vertical scribe line having two elongated sides and being divided into a plurality of portions with the same rectangular area along the two elongated sides, each of the plurality of portions of each scribe line being composed of said scribe line structure, said scribe line structure comprising a multi-layer structure with four sides formed over area of each portion of each scribe line and at least two rows of cavities formed along the four sides of said multi-layer structure, each of said cavities defining a corresponding bottom surface, said method comprising the steps of:
Dependencies are inferred from the claim text.