Method of fabricating semiconductor device
AssigneeSanyo Electric Co., Ltd.
InventorsNaoteru Matsubara, Hideki Mizuhara
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AssigneeSanyo Electric Co., Ltd.
InventorsNaoteru Matsubara, Hideki Mizuhara
Estimating the term…
A semiconductor device having a dual damascene structure having a highly reliable multilayered interconnection is applied to the present invention. A protective film (12) is formed on a first interconnection (11), and a modified SOG film (13a) is then provided thereon. An etch stopper film (14) is formed on the modified SOG film (13a), and a modified SOG film (15a) is then formed. The modified SOG film (15a), the etch stopper film (14), and the modified SOG film (13a) are etched away using a resist pattern, to form a via hole (17). The modified SOG film (15a) is etched away using the resist pattern, to form a recess (19) serving as a trench interconnection portion. The etch stopper film (14) and the protective film (12) which are exposed are removed, and the recess is filled with a conductive material (20), to form a conductive plug in the via hole and a second interconnection.
A method of fabricating a semiconductor device, comprising the steps of:
Dependencies are inferred from the claim text.